Semiconductor switch

ABSTRACT

A semiconductor switch includes first and second normally off type FETs Q 1 , Q 2  and a normally on type FET Q 3  connected between the first normally off type FET Q 1  and the second normally off type FET Q 2 . Further, in the semiconductor switch, the normally on type FET Q 3  is connected between the first and second normally off type FETs Q 1 , Q 2  in series.

TECHNICAL FIELD

The present invention relates to semiconductor switches and, moreparticularly, to a high-voltage semiconductor switch, available for usein an alternating current, including a normally on type FET, with a highwithstand voltage, which is formed of a compound semiconductor and Siand two normally off type MOS FETs, with low on-resistance, which areconnected to the normally on type FET in series.

BACKGROUND ART

FIGS. 1, 2, and 3 show that alternating current semiconductor switches(hereinafter referred to as alternating current switches) thatcontrollably switch on and switch off an alternating current signal bycontrol signals. These alternating current switches employ twohigh-voltage FETs to controllably switch on and switch off thealternating current signal applied to first and second terminals 11 and12.

An alternating current switch shown in FIG. 1 is comprised of a normallyoff type MOS FET Q11 (hereinafter referred to as FET Q11) and a normallyoff type MOS FET Q12 (hereinafter referred to as FET Q12), which areconnected in series in opposite direction between the first and secondterminals 11 and 12. With an alternating current switch shown in FIG. 2,a normally off type FET Q13 and a normally off type FET Q14 areconnected in series in opposite direction and the connection between adrain and a source is opposite to that shown in FIG. 1.

With the alternating current switch shown in FIG. 1, if a first gatesignal lies at a positive voltage and is applied from the gate terminalG1 t to a gate G1 of the FET Q11 while a second gate signal lies at apositive voltage and is applied from the gate terminal G2 t to a gate G2of the FET Q12, both the FET Q11 and the FET Q12 are turned on.Therefore, during a period wherein the first and second gate signals lieat the positive voltage, a current flows from the first terminal 11 tothe second terminal 12 when the first terminal 11 is applied with thepositive voltage whereas a current flows from the second terminal 12 tothe first terminal 11 when the second terminal 12 is applied with thepositive voltage.

Next, if the first and second gate signals lie at zero voltage and areapplied to the gates of the FET Q11 and the FET Q12, both the FET Q11and the FET Q12 are turned off. For this reason, no current flowsthrough the alternating current switch.

Also, the alternating current switch shown in FIG. 2 operates in thesame manner as that shown in FIG. 1.

An alternating current switch shown in FIG. 3 is comprised of a firstseries circuit, composed of a diode D11 and a normally off type FET Q15,and a second series circuit, composed of a diode D12 and a normally offtype FET Q16, which are connected in parallel between the first andsecond terminals 11, 12. An anode of the diode D11 is connected to thefirst terminal 11 and an anode of the diode 12 is connected to thesecond terminal 12.

With the alternating current switch shown in FIG. 3, if a first gatesignal takes a positive voltage and is applied from a gate terminal G1 tto a gate G1 of the FET Q15 while a second gate signal takes a positivevoltage and is applied from a gate terminal G2 t to a gate G2 of the FETQ16, both the FETs Q15 and Q16 are turned on. For this reason, a currentflows in a path expressed as “First Terminal 11→Diode D11→FET Q15→SecondTerminal 12”. That is, during a period in which the first and secondgate signals take a positive voltage, a current flows from the firstterminal 11 to the second terminal 12 when the second terminal 12 isapplied with a positive voltage. Also, when the second terminal 12 isapplied with a positive voltage, a current flows in a path expressed as“Second Terminal 12→Diode D12→FET Q16→First Terminal 11”. That is, thecurrent flows from the second terminal 12 to the first terminal 11.

Next, if the first and second gate signals take zero voltage and areapplied to the gates of the FETs Q15, Q16, both the FETs Q15 and Q16 areturned off. Therefore, no current flows through the alternating currentswitch.

However, with the alternating current switches shown in FIGS. 1 and 2,since the high-voltage elements with high on-resistance are connected inseries, on-resistance of the alternating current semiconductor switchremarkably increases, resulting in an increase in losses. Further, withthe alternating current switch shown in FIG. 3, the number of componentparts increases with a resultant increase in costs.

In the meanwhile, although the FET of the semiconductor, made ofcompound such as SiC and GaN or the like, has a high withstand voltagebut low on-resistance, and is highly suited to a heavy-power switch,only a so-called normally on type FET (an FET through which draincurrent flows when a gate signal falls at a zero potential) can bemanufactured. With such a normally on type FET, no gate signal existsduring a time interval in which a power supply is turned on and, hence,a drain current is caused to flow with resultant damages to the normallyon type FET, resulting in an extremely difficult usage. For this reason,there has been a need for development of an FET in which no currentflows even in the presence of a gate signal at a zero potential.

Therefore, as shown in FIG. 4, proposal has been made in the past to usea direct current switch wherein a normally on type FET Q18, composed ofSiC with a high voltage, and a normally off type FET Q17 with a lowvoltage and low on-resistance are connected in cascade between the firstand second terminals 11 and 12 as disclosed in Japanese PatentApplication Laid-Open NO. 5-75110. This direct current switch isconfigured to be of a high voltage with low on-resistance and a directcurrent signal is applied across the first and second terminals Hand 12.

With the direct current switch shown in FIG. 4, if a gate G1 of the FETQ17 is applied with a voltage greater than a threshold value, the FETQ17 is turned on and the FTE Q18 is also turned on. Further, if the gateG1 of the FET Q17 is applied with a voltage less than the thresholdvalue, the FET Q17 is turned off and the FTE Q18 is also turned off.That is, the direct current switch is turned on or turned off when thevoltage is applied to the gate G1 of the FET Q17 and the FET Q17 canserve to operate as if it were a single FET with a high withstandvoltage.

However, the direct current switch, shown in FIG. 4, cannot be used foralternating current switch. For this reason, the alternating currentswitch has been realized using the circuits shown in FIGS. 5 and 6.

The alternating current switch, shown in FIG. 5, has a circuit structurein which the direct current switch, shown in FIG. 4, is applied to thealternating current switch shown in FIG. 3. The FETs Q19, Q21, shown inFIG. 5, correspond to the FET Q15 shown in FIG. 3, and the FETs Q20,Q22, shown in FIG. 5, correspond to the FET Q16 shown in FIG. 3,operating in the same manner as those shown in FIGS. 3 and 4,respectively.

The alternating current switch, shown in FIG. 6, has a circuit structurein which the direct current switch, shown in FIG. 4, is applied to thealternating current switch shown in FIG. 1. The FETs Q25, Q26, shown inFIG. 6, corresponds to the FET Q11, shown in FIG. 1, and the FETs Q23,Q24, shown in FIG. 6, corresponds to the FET Q12 shown in FIG. 3,operating in the same manner as those shown in FIGS. 3 and 4,respectively.

DISCLOSURE OF INVENTION

However, with the alternating current switch shown in FIG. 5, there is aneed for two pieces of normally on type FETs as compared to thealternating current switch shown in FIG. 3 and, further, there is a needfor extra two pieces of power diodes for permitting main current toflow. That is, this results in an increase in the number of componentparts with a resultant increase in costs and an increase in lossescaused by the diodes. Also, the alternating current switch shown in FIG.6 uses an increased number of component parts with an increase in costs.

It is therefore an object of the present invention to provide asemiconductor switch wherein controllably turning on and turning off analternating current switch enables reduction in losses and which has ahigh withstand voltage and low in costs.

The present invention has been completed with a view to addressing theabove issues and one aspect of the present invention provides asemiconductor switch comprising a normally on type FET and first andsecond normally off type FETs which are connected in series, wherein thenormally on type FET is connected between the first normally off typeFET and the second normally off type FET.

Another aspect of the present invention provides a semiconductor switchcomprising a plurality of series connected normally on type FETs andfirst and second series connected normally off type FETs, wherein theplurality of normally on type FETs are connected between the firstnormally off type FET and the second normally off type FET.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a circuit diagram illustrating an example 1 of a semiconductorswitch of the related art.

FIG. 2 is a circuit diagram illustrating an example 2 of a semiconductorswitch of the related art.

FIG. 3 is a circuit diagram illustrating an example 3 of a semiconductorswitch of the related art.

FIG. 4 is a circuit diagram illustrating an example 4 of a semiconductorswitch of the related art.

FIG. 5 is a circuit diagram illustrating an example 5 of a semiconductorswitch of the related art.

FIG. 6 is a circuit diagram illustrating an example 6 of a semiconductorswitch of the related art.

FIG. 7 is a fundamental circuit diagram of a semiconductor switch of afirst embodiment according to the present invention.

FIG. 8 is a detailed circuit diagram of the semiconductor switch of thefirst embodiment according to the present invention.

FIG. 9 is a first equivalent circuit diagram of the semiconductor switchshown in FIG. 8.

FIG. 10 is a second equivalent circuit diagram of the semiconductorswitch shown in FIG. 8.

FIG. 11 is a third equivalent circuit diagram of the semiconductorswitch shown in FIG. 8.

FIG. 12 is a fourth equivalent circuit diagram of the semiconductorswitch shown in FIG. 8.

FIG. 13 is a circuit diagram of a semiconductor switch of a secondembodiment according to the present invention.

FIG. 14 is a circuit diagram of a semiconductor switch of a thirdembodiment according to the present invention.

FIG. 15 is a circuit diagram of a semiconductor switch of a fourthembodiment according to the present invention.

FIG. 16 is a circuit diagram of a semiconductor switch of a fifthembodiment according to the present invention.

FIG. 17 is a circuit diagram of a semiconductor switch of a sixthembodiment according to the present invention.

FIG. 18 is a circuit diagram of a semiconductor switch of a seventhembodiment according to the present invention.

FIG. 19 is a circuit diagram of a semiconductor switch of an eighthembodiment according to the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, semiconductor switches of various embodiments according tothe present invention are described in detail with reference to theaccompanying drawings.

First Embodiment

A semiconductor switch of a first embodiment according to the presentinvention is comprised of two MOS FETs, made of Si, with a low-voltageand low-on resistance between which a high voltage compoundsemiconductor FET is connected in series to controllably switch on orswitch off an alternating current signal with a resultant decrease inlosses to provide a semiconductor switch that has a highwithstand-voltage and is cost effective.

FIG. 7 is a fundamental circuit diagram of the semiconductor switch ofthe first embodiment according to the present invention.

The semiconductor switch, shown in FIG. 7, is comprised of normally offtype FETs Q1 and Q2 and a normally on type FET Q3 that is connectedbetween the normally off type FETs Q1 and Q2. A source of the FET Q1 isconnected to a first terminal 11 and a drain of the FET Q1 is connectedto a first main electrode 21 of the FET Q3, whose second main electrode22 is connected to a drain D of the FET Q2 whose source S is connectedto a second terminal 12.

The FETs Q1, Q2 include MOS FETs with a low voltage and lowon-resistance, respectively. The FET Q3 has low on-resistance and a highwithstand-voltage and includes, for instance, a compound semiconductor,such as SiC or GaN or the like, or a MESFET. The source and drain of thenormally-on type FET Q3 are symmetrically formed in structure and,hence, the first main electrode 21 or the second main electrode 22connected to a high potential terminal, of the first terminal 11 and thesecond terminal 12, plays a role as a drain whereas the other mainelectrode, connected to a lower potential terminal, serves as a source.

Further, a first gate signal, composed of a pulse signal or the like, isapplied to a gate G1 of the FET Q1 via a gate terminal G1 t and a secondgate signal is applied to a gate G2 of the FET Q2 via a gate terminal G2t whereas a third gate signal is applied to a gate G3 (controlelectrode) of the FET Q3 via a gate terminal G3 t.

Now, the operation of the semiconductor switch of the first embodimentwith such a structure is described below.

First, with an alternating current signal being applied across the firstand second terminals 11, 12, if the first terminal 11 lies at a highpotential and the second terminal 12 lies at a low potential, the firstmain electrode 21 of the FET Q3 becomes the drain and the second mainelectrode 22 becomes the source. If a third gate signal, which allowsthe gate G3 to lie at a high potential or zero potential with respect tothe potential of the second main electrode 22 serving as the source, isapplied to the gate terminal G3 t, the FET Q3 is turned on. Also, inthis moment, if the first gate signal is applied through the gateterminal G1 t to the gate G1 of the FET Q1 at a positive voltage whereasthe second gate signal is applied through the gate terminal G2 t to thegate G2 of the FET Q2 at a positive voltage, then, both the FETs Q1, Q2are turned on.

Next, if the second terminal 12 lies at a high potential and the firstterminal 12 lies at a low potential, the first main electrode 21 of theFET Q3 becomes the source and the second main electrode 22 becomes thedrain. If the third gate signal, which allows the gate G3 to remain atthe high potential or zero potential with respect to the potential ofthe first main electrode 21 serving as the source, is applied to thegate terminal G3 t, the FET Q3 is turned on.

Also, in this moment, if the first gate signal is applied through thegate terminal G1 t to the gate G1 of the FET Q1 at a positive voltagewhereas the second gate signal is applied through the gate terminal G2 tto the gate G2 of the FET Q2 at a positive voltage, then, both the FETsQ1, Q2 are turned on.

Additionally, even if the first terminal 11 lies at a high potential andthe second terminal 11 lies at a low potential while the second terminal12 lies at a high potential and the first terminal 12 lies at a lowpotential, the FET Q3 is turned off upon receipt of the gate signal thatallows the gate G3 to lie at the low potential with respect to thepotential of the main electrode that serves as the source.

Thus, with the semiconductor switch of the first embodiment, thepresence of the FET, composed of the high-voltage compound semiconductorconnected, to the two low-voltage and low on-resistance MOS FETs, eachmade of Si, in series to controllably switch on or switch off thealternating current signal enables reduction in losses, making itpossible to provide a semiconductor switch, with a high withstandvoltage, which is low in costs.

(Concrete Circuitry for Semiconductor Switch)

FIG. 8 is a concrete circuit diagram of the semiconductor switch of thefirst embodiment according to the present invention. While thesemiconductor witch, shown in FIG. 7, allows the gate G3 of the FET Q3to be applied with the voltage of the third gate signal applied from thegate terminal G3 t, the semiconductor witch, shown in FIG. 8,contemplates to allow a voltage of an alternating current signal,applied to the first and second terminals 11, 12, to be applied to thegate G3 of the FET Q3 through resistors for thereby eliminating the needfor inputting the third gate signal.

Connected to the source S of the FET Q1 are a cathode of a diode D1 andone terminal of a resistor R1 that serves as second current supplymeans. Connected to the source S of the FET Q2 are a cathode of a diodeD2 and one terminal of a resistor R2 serving as second current supplymeans. An anode of the diode D1 and the other terminal of the resistorR1 and an anode of the diode D2 and the other terminal of the resistorR2 are connected to the gate G3 of the FET Q3. The diode D1, D2 serve asdiodes to select one of the sources of the FETs Q1, Q2 in which thesource has a lower potential than that of the other. The resistors R1,R2 serve to admit biasing currents to flow to the associated diodes,respectively.

Also, since the semiconductor switch has the same other structure asthat shown in FIG. 7, the same component parts bear like referencenumerals and detail description of the same is herein omitted.

Now, the operation of the semiconductor switch shown in FIG. 8 isdescribed. First, if the first terminal 11 lies at a high potential andthe second terminal 12 lies at a low potential, this results in a firstequivalent circuit shown in FIG. 9. When this takes place, applying agate signal to the gate G2 of the FET Q2 enables the same to be turnedon. That is, one of the diodes D1 and D2, whose potential is low, isselected and the diode D2 is turned on whereupon the gate G3 of the FETQ3 takes a potential of the source S of the FET Q2. For this reason,when the FET Q2 is turned on, the FET Q3 is turned on. With the FET Q2turned off, no drain current flows and no drain current though the FETQ3 that is consequently turned off. That is, this results in anequivalent circuit shown in FIG. 10. In this moment, if the FET Q2 isapplied with the gate signal, the MOS FET is able to minimize a forwarddrop of a body diode Dq1.

Further, in FIG. 8, if the first terminal 11 lies at a low potential andthe second terminal 12 lies at a high potential, this results in anequivalent shown in FIG. 11. Applying a first gate signal to the gate G1of the FET Q1 enables the same to be turned on and turned off. That is,selecting the potential laying at a low value by the use of the diodesD1 and D2 enables the diode D1 to be turned on and the gate G3 of theFET Q3 takes the potential of the source S of the FET Q2. For thisreason, when the FET Q1 is turned on, the FET Q3 is turned on. With theFET Q1 turned off, no drain current flows through the FET Q1 and nodrain current flows through the FET Q3 that is consequently turned off.That is, this results in an equivalent circuit shown in FIG. 12. In thismoment, if the FET Q2 is applied with the gate signal, the MOS FET isable to minimize a forward drop of a body diode Dq2. That is, using thefirst and second terminals 11, 12 enables the alternating current signalto be switched on and switched off.

Second Embodiment

FIG. 13 is a circuit diagram of a semiconductor switch of a secondembodiment according to the present invention. The semiconductor switchof the second embodiment features that in place of the diodes D1, D2 ofthe semiconductor switch of the first embodiment, FETs Q4, Q5 areprovided to prevent erroneous operation due to noises and leakagecurrent.

In FIG. 13, the FETs Q4, Q5 include normally off type MOS FET switches,respectively, and a drain D of the FET Q4 is connected to the firstterminal 11 while a drain D of the FET Q5 is connected to the secondterminal 12. Sources S, S of the FETs Q4, Q5 are connected to a gate G3of a FET Q3.

Further, of the FETs Q4, Q5, applying a gate signal with a positivevoltage to the gate of the FET, which is connected to the terminal at alow potential, allows the same to be turned on and applying a gatesignal with a negative voltage to the gate of the FET, which isconnected to the terminal at a high potential, allows the same to beturned off. Here, of the FETs Q4, Q5, the FET, which is connected to oneof the FETs Q1, Q2 whose source lies at a low potential, is turned on,while the FET, which is connected to one of the FETs Q1, Q2 whose sourcelies at a low potential, is turned off.

Next, the operation of the semiconductor switch of the second embodimentwith such a structure is described.

First, if the first terminal 11 lies at a high potential and the secondterminal 12 lies at a low potential, applying a second gate signal tothe gate G2 of the FET Q2 enables the same to be turned on and turnedoff. That is, applying a gate signal with a positive voltage to the gateof the FET Q5 enables the FET Q2 to be turned on. For this reason, thegate G3 of the FET Q3 takes a potential of the source S of the FET Q2.Therefore, if the FET Q2 is turned on, then, the FET Q3 is turned on.With the FET Q2 turned off, no drain current flows and no drain currentflows through the FET Q3 that is consequently turned off.

Further, if the first terminal 11 lies at a low potential and the secondterminal 12 lies at a high potential, applying a first gate signal tothe gate G1 of the FET Q1 enables the same to be turned on and off. Thatis, applying a gate signal with a positive voltage to the gate of theFET Q4 enables the FET Q1 to be turned on. Thus, the gate G3 of the FETQ3 takes a potential of the source S of the FET Q1. For this reason, ifthe FET Q1 is turned on, then, the FET Q3 is turned on. Therefore, ifthe FET Q1 is turned off, the FET Q3 is turned off. If the FET Q1 isturned off, no drain current flows and no drain current flows throughthe FET Q3 that is consequently turned off. That is, using the first andsecond terminals 11, 12 enables the alternating current signal to beswitched on and switched off.

Thus, the semiconductor switch of the second embodiment has the sameadvantageous effects as those of the semiconductor switch of the firstembodiment and a capability of stably turning on the FETs Q4, Q5,thereby enabling the prevention of erroneous operations due to noisesand leakage current.

Third Embodiment

FIG. 14 is a circuit diagram of a semiconductor switch of a thirdembodiment according to the present invention. A normally on type FET isprobable to encounter a phenomenon wherein the FET is not completelyturned off at the gate voltage of zero voltage to cause current to flowin a half way. The semiconductor switch of the third embodiment has afeature in that current is caused to flow from a terminal at a highpotential to the gate G3 of the FET Q3 via a diode and resistor to allowthe gate voltage to have a positive voltage to reliably turn on the FETQ3.

Also, in FIG. 14, the same component parts as those shown in FIG. 7 bearlike reference numerals to omit description of the same.

Connected to a first terminal 11 is an anode of a diode D1, whosecathode is connected via a resistor R1 to an anode of a diode D3, ananode of a diode D4 and a gate G3 of an FET Q3. A cathode of the diodeD3 is connected to a gate G1 of an FET Q1 and a cathode of the diode D4is connected to a gate G2 of an FET Q2. Connected to a second terminal12 is an anode of a diode D2, whose cathode is connected to one terminalof the resistor R1 and the cathode of the diode D1.

Next, the operation of the semiconductor switch of the third embodimentwith such a structure is described. Here, description is made of onlythe operation related to the FET Q3 whose gate G3 is applied withsignals from the diodes D1 to D4.

First, if the first terminal 11 lies at a high potential and the secondterminal 12 lies at a low potential, the first main electrode 21 of theFET Q3 serves as a drain and the second main electrode 22 serves as asource. When this takes place, current flows in a path expressed as“First Terminal 11→Diode D1→Resistor R1→Gate G3 of FET Q3”. This enablesthe FET Q3 to enhance the gate voltage, thereby reliably turning on theFET Q3. Also, the diode D2 remains off.

Next, if the second terminal 12 lies at a high potential and the firstterminal 11 lies at a low potential, the first main electrode 21 of theFET Q3 serves as a source and the second main electrode 22 serves as adrain. When this takes place, current flows in a path expressed as“Second Terminal 12→Diode D2→Resistor R1→Gate G3 of FET Q3”. Thisenables the FET Q3 to enhance the gate voltage, thereby reliably turningon the FET Q3. Also, the diode D1 remains off.

Thus, the semiconductor switch of the third embodiment has the sameadvantageous effects as those of the semiconductor switch of the firstembodiment and, in addition, is able to allow current to flow from theterminal at the high potential to the gate G3 of the FET Q3 via thediode and resistor to cause the gate voltage to be positive voltage forthereby reliably turning on the FET Q3.

Fourth Embodiment

FIG. 15 is a circuit diagram of a semiconductor switch of a fourthembodiment according to the present invention. The semiconductor switchof the fourth embodiment has a feature to further include, in additionto the structure shown in FIG. 8, a direct current power supply E thatis connected between a junction between resistors R1, R2 and the gate G3of the FET Q3. The direct current power supply E has a positive terminalconnected to the gate G3 of the FET Q3 and a negative electrodeconnected to the junction between the resistors R1, R2.

Also, in FIG. 15, the same component parts as those shown in FIG. 7 bearlike reference numerals to omit description of the same.

Thus, with the semiconductor switch of the fourth embodiment, since adirect-voltage of the direct current power supply E is applied to thegate G3 of the FET Q3 as a bias voltage at all times, no shortage ingate voltage occurs and no erroneous operation of the FET Q3 is avoided.

Fifth Embodiment

With the semiconductor switch shown in FIG. 8, each of the FETs Q2, Q3is an FET, made of Si, with a withstand voltage of 20V and on-resistanceof 1 mΩ. The FET Q3 is a normally on type compound FET with a withstandvoltage of 1000V. If the FET Q3 is supposed to be turned off at the gatevoltage of −20V, the FET Q2 has a withstand voltage of 20V and thepresence of the withstand voltage 20V enables the operation.

However, if the FET Q3 includes an FET, made of a compound semiconductorwith a further increased withstand voltage of, for instance, 4000V, toturn off this FET, the gate should be applied with a voltage ofapproximately −50V. For this reason, in order to turn on and turn ff thesemiconductor switch shown in FIG. 8, the FETs Q1, Q2 need to have awithstand voltage of 50V.

But, with the Si-FET with a withstand voltage of 50V, on-resistancebecomes 5 to 10 times greater than that of the FET with a withstandvoltage of 20V, resulting in an increase in entire on-resistance.

Therefore, as shown in FIG. 16, the semiconductor switch of the fifthembodiment contemplates to further include, in addition to the structureof the semiconductor switch shown in FIG. 8, a normally on type FET Q6with a medium voltage connected between the FETs Q1, Q3 and a normallyon type FET Q7 with a medium voltage connected between the FETs Q3, Q2.

With a set of the FETs Q2 and Q7 and a set of the FETs Q1 and Q6arranged in a structure, as shown in FIG. 16, to form an equivalentcircuit equal to the FET with a withstand voltage greater than 50V, theFET Q3 can be turned on and turned off. That is, the FETs Q6 and Q7include normally on type FETs, respectively, which can be turned on andturned off at a gate signal less than −20V and, hence, the FETs Q1 andQ2 are sufficed to have a withstand voltage of 20V. Also, the FET Q3includes normally on type FET that can be turned on and turned off atthe gate signal of a value less than −50V and, hence, the FETs Q6 and Q7are sufficed to have a withstand voltage of 50V.

Hereunder, details of a structure and operation of the semiconductorswitch shown in FIG. 16 is described below. A first main electrode 23 ofthe FET Q6 is connected to a drain D of the FET Q1 and a secondelectrode 24 of the FET Q6 is connected to a first main electrode 21 ofthe FET Q3. A first main electrode 25 of the FET Q7 is connected to asecond main electrode 22 of the FET Q3 and a second electrode 26 of theFET Q7 is connected to a drain D of the FET Q2. Connected to the gate G3of the FET Q3 in common are a gate 6 of the FET Q6 and a gate G7 of theFET Q7.

Next, the operation of the semiconductor switch of the fifth embodimentwith such a structure is described below.

First, if the first terminal 11 lies at a high potential and the secondterminal 12 lies at a low potential, applying a second gate signal tothe gate G2 of the FET Q2 enables the same to be turned on and turnedoff. That is, the diode D2 is turned on and the gate G3 of the FET Q3,the gate G6 of the FET Q6 and the gate 7 of the FTE Q7 lie at apotential of the source S of the FET Q2. For this reason, with the FETQ2 turned on, the FETs Q3, Q6, Q7 are turned on. With the FET Q2 turnedoff, no drain current flows and no drain current flows through the FETsQ3, Q6, Q7, which are consequently turned off.

Further, if the first terminal 11 lies at a low potential and the secondterminal 12 lies at a high potential, applying a first gate signal tothe gate G1 of the FET Q1 enables the same to be turned on and turnedoff. That is, the diode D1 is turned on and the gate G3 of the FET Q3,the gate G6 of the FET Q6 and the gate 7 of the FTE Q7 lie at apotential of the source S of the FET Q1. For this reason, with the FETQ1 turned on, the FETs Q3, Q6, Q7 are turned on. With the FET Q1 turnedoff, no drain current flows and no drain current flows through the FETsQ3, Q6, Q7, which are consequently turned off. That is, using the firstand second terminals 11, 12 enable the alternating current signal to beswitched on or switched off.

Thus, the semiconductor switch of the fifth embodiment has the sameadvantageous effects as those of the semiconductor switch of the secondembodiment and is able to provide a semiconductor switch with a highvoltage that is comprised of three normally on type FETs and twonormally off type SI-MOS FETs with a low voltage and low on-resistance.

Sixth Embodiment

FIG. 17 is a circuit diagram of a semiconductor switch of a sixthembodiment according to the present invention. The semiconductor switch,shown in FIG. 17, has a feature to further include, in addition to thestructure shown in FIG. 17, a normally on type FET Q6 with a mediumvoltage connected between the FETs Q1, Q3 and a normally on type FET Q7with a medium voltage connected between the FETs Q3, Q2. The sources Sof the FETs Q4, Q5 are connected to the gate G3 of the FET Q3, the gateG6 of the FET Q6 and the gate 7 of the FTE Q7.

The semiconductor switch of the sixth embodiment with such a structureoperates substantially in the same manner as that in which thesemiconductor switch, shown in FIG. 13, operates. But, the semiconductorswitch of the sixth embodiment differs from that shown in FIG. 13 inthat the gate G3 of the FET Q3, the gate G6 of the FET Q6 and the gate 7of the FTE Q7 are arranged to have the same potential as that of thesource S of the FET connected to the terminal with a low potentialwhereby the FET Q3, the FET Q6 and the FTE Q7 are turned on.

Thus, the semiconductor switch of the sixth embodiment has the sameadvantageous effects as those of the semiconductor switch of the fifthembodiment and is able to stably turn on the FETs Q4, Q5, therebypreventing erroneous operation caused by noises and leakage current.

Seventh Embodiment

FIG. 18 is a circuit diagram of a semiconductor switch of a seventhembodiment according to the present invention. The semiconductor switch,shown in FIG. 18, has a feature to further include, in addition to thestructure shown in FIG. 14, a normally on type FET Q6 with a mediumvoltage connected between the FETs Q1, Q3 and a normally on type FET Q7with a medium voltage connected between the FETs Q3, Q2. Connected tothe gate G3 of the FET Q3 are the gate G6 of the FET Q6 and the gate 7of the FTE Q7.

The semiconductor switch of the eighth embodiment with such a structurehas the same advantageous effects as those of the semiconductor switchof the fifth embodiment and is able to allow current to flow from theterminal with a high potential to the gate G3 of the FET Q3, the gate G6of the FET Q6 and the gate 7 of the FTE Q7 via the diode and theresistor to permit the gate voltage to lie at a positive voltage wherebythe FET Q3, the FET Q6 and the FTE Q7 are reliably turned on.

Eighth Embodiment

FIG. 19 is a circuit diagram of a semiconductor switch of an eighthembodiment according to the present invention. The semiconductor switchhas a feature to further include, in addition to the structure shown inFIG. 15, a normally on type FET Q6 with a medium voltage connectedbetween the FETs Q1, Q3 and a normally on type FET Q7 with a mediumvoltage connected between the FETs Q3, Q2. Connected to the gate G3 ofthe FET Q3 are the gate G6 of the FET Q6 and the gate 7 of the FTE Q7.

The semiconductor switch of the seventh embodiment with such a structurehas the same advantageous effects as those of the semiconductor switchof the fifth embodiment and since a direct-voltage of the direct currentpower supply E is applied to the gate G3 of the FET Q3, the gate G6 ofthe FET Q6 and the gate 7 of the FTE Q7 as a bias voltage at all times,no shortage in gate voltage occurs and no erroneous operations occur inthe FET Q3, the FET Q6 and the FTE Q7.

Although the semiconductor switches of the first, third to fifth andseventh and eighth embodiments have employed the resistor R1 to allowcurrent to flow, a constant current element and constant current circuitor the like may be employed, for thereby permitting a forward current tostably flow in a value ranging from a low voltage to a high voltage.

INDUSTRIAL APPLICABILITY

According to the present invention, connecting a normally on type FETbetween a first normally off type FET and a second normally off type FETenables the provision of a semiconductor switch with a high withstandvoltage at low cost.

1. A semiconductor switch comprising: a normally on type FET; and firstand second normally off type FETs which are connected to the normally ontype FET in series, wherein the normally on type FET is connectedbetween the first normally off type FET and the second normally off typeFET.
 2. A semiconductor switch comprising: a plurality of seriesconnected normally on type FETs; and first and second normally off typeFETs which are connected to the plurality of normally on type FETs inseries, wherein the plurality of normally on type FETs are connectedbetween the first normally off type FET and the second normally off typeFET.
 3. The semiconductor switch according to claims 1 or 2, furthercomprising control means operative to turn on and turn off the first andsecond normally off type FETs for thereby turning on or turning off thenormally on type FET.
 4. The semiconductor switch according to claim 3,wherein the control means comprises: a first diode having one electrodeconnected to a source of the first normally off type FET; first currentsupply means for supplying a current to the first diode; a second diodehaving one electrode connected to a source of the second normally offtype FET and having the other electrode connected to the other electrodeof the first diode; and second current supply means for supplying acurrent to the second diode; wherein a junction between the otherelectrode of the first diode and the other electrode of the second diodeis connected to a gate of the normally on type FET.
 5. The semiconductorswitch according to claim 3, wherein the control means comprises: afirst diode having one electrode connected to a source of the firstnormally off type FET; a second diode having one electrode connected toa source of the second normally off type FET and having the otherelectrode connected to the other electrode of the first diode; aresistor connected between a junction between the other electrode of thefirst diode and the other electrode of the second diode and a gate ofthe normally on type FET; a third diode connected between a gate of thenormally on type FET and a gate of the first normally off type FET; anda fourth diode connected between the gate of the normally on type FETand the gate of the second normally off type FET.
 6. The semiconductorswitch according to claim 4, further comprising a direct current powersupply by which a direct current is applied to the gate of the normallyon type FET.
 7. The semiconductor switch according to claims 1 or 2,wherein the control means comprises: a first switch having a firstelectrode connected to a source of the first normally off type FET; anda second switch having a third electrode connected to a source of thesecond normally off type FET and a fourth electrode connected to asecond electrode of the first switch; wherein a junction between thesecond electrode of the first switch and the fourth electrode of thesecond switch is connected to a gate of the normally on type FET;whereby one of the first and second switches, which is connected to oneof the first and second normally off type FETs of which source potentialis low, is turned on whereas the other one of the first and secondswitches, which is connected to the other one of the first and secondnormally off type FETs of which source potential is high, is turned off.8. The semiconductor switch according to claim 1, wherein the normallyon type FET includes a compound semiconductor and the first and secondnormally off type FETs include Si-semiconductor.
 9. The semiconductorswitch according to claim 1, wherein the normally on type FET includes aMES FET.
 10. The semiconductor switch according to claim 1, wherein thenormally on type FET includes a high voltage semiconductor FET and thefirst and second normally off type FETs include a FET with low voltageand low on-resistance.
 11. The semiconductor switch according to claim3, wherein the normally on type FET includes a compound semiconductorand the first and second normally off type FETs includeSi-semiconductor.
 12. The semiconductor switch according to claim 3,wherein the normally on type FET includes a MES FET.
 13. Thesemiconductor switch according to claim 3, wherein the normally on typeFET includes a high voltage semiconductor FET and the first and secondnormally off type FETs include a FET with low voltage and lowon-resistance.